help with programmable circuits (like pal gal or similar)

[sphinx]

with programmable circuits i mean pal, gal, or pld i think they are all called.

i am looking for help on programmable circuits. i would like to decode address lines in a z80 system running at 8MHZ
for some i/o circuits in these areas D0-D3, D4-D7, E0-E3, E4-E7, F0-F3, F4-F7, F8-FB, FC-FF.

i know about the use of some sort of programmable circuit that can be used for this. i know the very basic of this,
but i never used it before.

i know how it could be done with logic but i would like to use of pal gal or whatever they use today, looking for help
on choice of what circuit to use for this purpose. there is a bit too much to pick from.

thanx in advance

[UncleBog]

A GAL or SPLD (Simple Programmable Logic Device) is what you need, almost any part could perform the simple combinatorial decode that you require. You've listed 8 inputs and 8 outputs and maybe there's an address strobe as well so you'll need a 20 pin part (16V8 for instance), or a 24 pin (22V10 for instance).

You'll also need some software (Lattice provide a free version of their old PLD software called ispLEVER Classic Base) to convert your logic into a bit file, and a programmer to load this file into the GAL.

[sphinx]

i am not on exactly sure on what inputs i need besides the A0-A7 so better to have some extra, i will need to check that up
to be sure on what extra pins i need for this purpose. i got some old 16v8 chips i can use for testing.
i will need to read about more on adress decoding and check designs on how its used.

i will check the software up as well.

i got a programmer on its way so i can program these.

thanx for input

regards sphinx

[UncleBog]

I'm don't know what you're up to but address decode normally starts from the MS address line. If you use A[7:0] you'll find that these small spaces are repeated 256 times through the address range.

[sphinx]

i am am trying to decode addresses for z80 parallel i/o and serial i/o chips.

[Sideshow Bob]

How much memory do you plan in your system? It could be that momory mapped I/O is more easy for you. And then using a simple solution with a say 74xx138 for decoding on the upper address lines

[sphinx]

my idea of memory would be to 512k x 8 and bank it to 64k x 8

[pickit2]

Last time I used pal/gal was 40 years ago. we used them to decode system status in an alarm unit.
we replaced them with Pic84's

you could also test your Gedec fuse map in Proteus
I would use gals as pal are one time program.

http://ece-research.unm.edu/jimp/310/slides/8086_memory2.html

[Sideshow Bob]

I remember we used a program language named ABEL for those PAL chips. An ABEL truth table would probaly have solved this task. However that was about 20 years back in time since i last used ABEL
 https://en.wikipedia.org/wiki/Advanced_Boolean_Expression_Language
@sphinx What kind of prgrams do you use for Z80 codeing/debugging?

[sphinx]

i have a  "monitor program" written in assembler and i found an old iar z80 c compiler

[UncleBog]

ABEL is built into the Lattice software that I referenced earlier.

[kreutz]

You can also use a parallel EPROM (or EEProm) as address (CS) decoder or make your own, for simple address decoders, using standard TTL/CMOS logic gates. Sometimes it is easier to find or make a simple programer for the former. For more info take a look at: http://research.cs.tamu.edu/prism/lectures/mbsd/mbsd_l16.pdf

[h0nk]

Hello sphinx,

You could simply use a 74(X)154 and decode A5 to A2 with it.
It will give over all 16 /CS-Outputs where only 8 Outputs are used for Your address ranges.
Some additional logic is required for the "Chip Select Inputs" of the 74(X)154 to
limit the decoding to the range 0xd0 to 0xff and to /IORQ and so on.


Best Regards

[Dgtslot]

Hy all,
i think that PAL,GAL and ABEL belong to the past.
I suggest sphinx to use a very basic CPLD/FPGA eval board that permit to view all you want.
For example with a MAX10 you could use the Signal Tap Logic Analizer function to trig and acquire any events on your address and data bus. If you want only use it like "bus analizer" you do not need to write any vhdl code.
For example: www.digikey.com/product-detail/en/altera/EK-10M08E144/544-3042-ND/4976140
I know well altera device but there are a lot of other alternatives.

Best regards
Luca

[tumbleweed]

Does anyone even make small, cheap CPLD devices (ie 22v10 class) anymore?

Once in a while I need some simple glue logic.

[weetit]

I think you can start with small and cheap FPGA board.  If you are a student, look for a student discount from digilent website.  PAL/GAL is almost obsolete, or if you need something that non-volatile maybe Altera Max10.

[PICker]

I'm starting to study FPGAs with internal analog peripherals (ADC, DAC, DSP etc.). If you are interested in this kind of devices I suggest you to start with a low cost demo board like the SmartFusion Evaluation Kit (https://www.microsemi.com/products/fpga-soc/design-resources/dev-kits/smartfusion/smartfusion-evaluation-kit#overview) for less than 100$.
It uses a A2F200M3F-FGG484, a SmartFusion Customizable System-on-Chip (cSoC); you can find a complete datasheet here: http://pdf1.alldatasheet.com/datasheet-pdf/view/526114/MICROSEMI/A2F200M3F-FGG484.html.

[weetit]

@PICker  A2F200M3F-FGG484 with analog programmable is very interesting.  I have never checked out Microsemi before, I should get one of this.  Do you use them a lot?

[PICker]

@weetit, I'm just starting my experience with this module. As first impression, tHe level of complexity is higher in comparison with standard MCUs I usually use (MSP,PIC, AVR).